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? semiconductor components industries, llc, 2010 january, 2010 ? rev. 5 1 publication order number: adt7421/d adt7421 precision temperature sensor with beta compensation (for <45 nm geometries) the adt7421 is a dual ? channel digital thermometer and under/overtemperature alarm, intended for use in pcs and thermal management systems. it is pin ? and register ? compatible with the adm1032, adt7461 and adt7461a. the adt7421 includes beta cancellation t echnology. this enables accurate measurement of temperature from very small geometry (45 nm) processes. significant variations in the beta factor can be observed when different currents are applied to transistors embedded in small geometry cpu?s. this leads to large temperature errors. the adt7421 automatically cancels the effects of error induced by beta variations. features ? on ? chip and remote temperature sensor ? 0.25 c resolution on remote channel ? 1 c resolution on local channel ? automatically cancels the effect of beta variation in thermal transistors on small geometry cpu?s ? automatically cancels up to 50 (typical) of resistance in series with remote transistor ? extended, switchable temperature measurement range 0 c to +125 c (default) or ? 40 c to +125 c ? pin ? and register ? compatible with adm1032, adt7461, adt7461a, emc1402, and asc7525 ? 2 ? wire smbus serial interface with smbus alert support ? programmable over/undertemperature limits ? offset registers for system calibration ? up to two overtemperature fail ? safe therm outputs ? small 8 ? lead msop and sop packages ? these are pb ? free devices applications ? desktop and notebook computers ? industrial controllers ? smart batteries ? automotive ? embedded systems ? burn ? in applications ? instrumentation http://onsemi.com pin assignment v dd d+ d? gnd alert/therm2 therm 1 2 3 4 8 7 6 5 (top view) sclk sdata see detailed ordering and shipping information in the package dimensions section on page 18 of this data sheet. ordering information marking diagrams msop ? 8 case 846ab 1 soic ? 8 case 751 t7421 alywr 1 8 l7x = refer to ordering table a = assembly location y = year w = work week = pb ? free package 1 1 8 l7x ayw (note: microdot may be in either location) a = assembly location l = wafer lot y = year w = work week r = smbus address = pb ? free package
adt7421 http://onsemi.com 2 another feature of the adt7421 is series resistance cancellation, where up to 50 (typical) of resistance in series with the temperature monitoring transistor can be automatically cancelled from the temperature result, allowing noise filtering. the combination of beta cancellation and series resistance cancellation provides critical high accuracy temperature sensing on 45 nm cpu?s and gpu?s. the adt7421 can measure the temperature of a remote thermal transistor accurate to 1 c and the ambient temperature accurate to 1 c. the temperature measurement range defaults to 0 c to +125 c, compatible with the adm1032, but it can be switched to a wider measurement range of ? 40 c to +125 c. the adt7421 has a configurable alert output and an extended, switchable temperature measurement range. the adt7421 communicates over a 2 ? wire serial interface, compatible with system management bus (smbus) standards. the default smbus address of the adt7421 is 0x4c. an adt7421 ? 2 is available with a smbus address of 0x4d. this is useful if more than one adt7421 is used on the same smbus. an alert output signals when the on ? chip or remote temperature is out of range. the therm output is a comparator output that allows on/off control of a cooling fan. the alert output can be reconfigured as a second therm output, if required. figure 1. block diagram a ? to ? d converter run/standby busy remote offset register limit comparator status register interrupt masking remote temperature value register local temperature value register on ? chip temperature sensor analog mux external diode open ? circuit smbus interface adt7421 3 2 8 4 1 57 v dd gnd sdata sclk therm 6 d+ d? alert/therm2 digital mux configuration registers external therm limit registers local therm limit registers remote temperature high ? limit register remote temperature low ? limit register local temperature high ? limit register local temperature low ? limit register conversion rate register address pointer register digital mux pin assignment pin no. mnemonic description 1 v dd positive supply, 3.0 v to 3.6 v. 2 d+ positive connection to remote temperature sensor. (anode) 3 d ? negative connection to remote temperature sensor. (cathode) 4 therm open-drain output. can be used to turn a fan on/off or throttle a cpu clock in the event of an overtemperature condition. requires pullup resistor. 5 gnd supply ground connection. 6 alert / therm2 open-drain logic output used as interrupt or smbus alert . this can also be configured as a second therm output. requires pullup resistor. 7 sdata logic input/output, smbus serial data. open-drain output. requires pullup resistor. 8 sclk logic input, smbus serial clock. requires pullup resistor.
adt7421 http://onsemi.com 3 maximum ratings parameter rating positive supply voltage (v dd ) to gnd ? 0.3 v, +3.6 v d+ ? 0.3 v to v dd + 0.3 v d ? to gnd ? 0.3 v to +0.6 v scl, sda, alert , therm ? 0.3 v to v dd +0.3 v input current, sda, therm2 ? 1 ma, +50 ma input current, d ? ? 1 ma esd rating, all pins (human body model) 1500 v esd rating, all pins (machine model) 100 v maximum junction temperature (t j max) 150 c storage temperature range ? 65 c to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. note: this device is esd sensitive. use standard esd precautions when handling. thermal resistance package type ja jc unit 8 ? lead msop 142 43.74 c/w smbus timing specifications parameter (note 1) limit at t min and t max unit description f sclk 400 khz max t low 1.3 s min clock low period, between 10% points t high 0.6 s min clock high period, between 90% points t r 300 ns max clock/data rise time t f 300 ns max clock/data fall time t su; sta 600 ns min start condition setup time t hd; sta (note 2) 600 ns min start condition hold time t su; dat (note 3) 100 ns min data setup time t su; sto (note 4) 600 ns min stop condition setup time t buf 1.3 s min bus free time between stop and start conditions 1. guaranteed by design, but not production tested. 2. time from 10% of sdata to 90% of sclk. 3. time for 10% or 90% of sdata to 10% of sclk. 4. time for 90% of sclk to 10% of sdata. figure 2. serial bus timing sclk sdata t r t f t low t hd;dat t hd;sta t high t su;dat stop start stop start t su;sta t su;sto t hd;sta t buf
adt7421 http://onsemi.com 4 electrical characteristics (t a = ? 40 c to +125 c, v dd = 3.0 v to 3.6 v, unless otherwise noted) parameter conditions min typ max unit power supply supply voltage, v dd 3.0 3.30 3.6 v average operating supply current, i dd 0.0625 conversions/sec rate (note 1) 3.0 4.0 ma standby mode supply current ? 40 c t a +85 c ? 40 c t a +125 c 10 20 a power-on-reset threshold 1.0 2.8 v temperature ? to ? digital converter local sensor accuracy 0 c t a +125 c 2.75 c resolution 1.0 c remote transistor sensor accuracy +40 c t a +85 c, +60 c t d +110 c (note 2) +25 c t a +85 c, +60 c t d +110 c (note 2) t a = +40 c, +60 c t d +110 c (note 2) 2.5 3.25 1.75 c resolution 0.25 c remote sensor source current the range of source currents provided to the external thermal transistor for temperature measurements. 10 to 360 a conversion time from stop bit to conversion complete, one-shot mode with averaging switched on. one-shot mode with averaging off. 184 20 ms maximum series resistance cancelled resistance split evenly on both the d+ and d? inputs. 50 open ? drain digital outputs (therm , alert /therm2 , sda) output low voltage, v ol i out = ? 6.0 ma 0.2 v high level output leakage current, i oh v out = v dd 0.1 1.0 a smbus interface (note 3) logic input high voltage, v ih scl, sda 3.0 v v dd 3.6 v 2.1 v logic input low voltage, v il scl, sda 3.0 v v dd 3.6 v 0.8 v hysteresis 500 mv sda output low voltage, v ol i out = ? 6.0 ma 0.4 v logic input current, i ih , i il ? 1.0 +1.0 a smbus input capacitance, sclk, sdata 10 pf smbus clock frequency 400 khz smbus timeout (note 4) user programmable 25 300 ms sclk falling edge to sdata valid time master clocking in data 1.0 s 1. see table 4 for information on other conversion rates. 2. guaranteed by characterization, but not production tested. 3. see smbus timing specifications section for more information. 4. disabled by default. detailed procedures to enable it are in the serial bus interface section of this datasheet.
adt7421 http://onsemi.com 5 typical characteristics 100 mv 250 mv noise frequency 6e+08 5e+08 4e+08 3e+08 2e+08 1e+08 0 ? 6 ? 4 ? 2 0 2 4 6 temp error ( c) capacitance (pf) 10,000 1000 100 10 1 ? 1.00 ? 0.75 ? 0.50 ? 0.25 0 0.50 0.75 1.00 temp error ( c) 0.25 leakage resistance (m ) 90 60 50 40 30 20 10 0 ? 80 ? 60 ? 40 ? 20 20 40 60 80 temp error ( c) 70 80 100 0 d+ to gnd d+ to vcc t a & t d oil bath temperature ( c) 125 100 75 50 25 0 ? 25 ? 50 ? 5 ? 4 ? 2 ? 1 1 2 4 5 temp error ( c) ? 3 0 3 150 t a & t d oil bath temperature ( c) 125 100 75 50 25 0 ? 25 ? 50 ? 5 ? 3 ? 2 0 2 3 4 5 temp error ( c) 1 ? 1 ? 4 150 rs ( ) 120 100 80 60 40 20 0 0 0.1 0.3 0.4 0.6 0.8 0.9 1.0 temp error ( c) 0.7 0.5 0.2 figure 3. temperature error vs. d+, d ? capacitance figure 4. temperature error vs. pcb leakage resistance figure 5. local temperature error vs. temperature figure 6. remote temperature error vs. temperature figure 7. temperature error vs. series resistance on d+, d ? figure 8. external temp error vs. power supply noise
adt7421 http://onsemi.com 6 theory of operation the adt7421 is a local and remote temperature sensor and over/undertemperature alarm, with the added ability to automatically cancel the effect of beta variations in embedded thermal transistors in small geometry cpu?s. when the adt7421 is operating normally, the on ? board adc operates in a free running mode. the analog input multiplexer alternately selects either the on ? chip temperature sensor to measure its local temperature or the remote temperature sensor. the adc digitizes these signals and the results are stored in the local and remote temperature value registers. the local and remote measurement results are compared with the corresponding high, low, and therm temperature limits, stored in eight on ? chip registers. out ? of ? limit comparisons generate flags that are stored in the status register. a result that exceeds the high temperature limit or the low temperature limit causes the alert output to assert. the alert output also asserts if an external transistor fault is detected. exceeding the therm temperature limits causes the therm output to assert low. the alert output can be reprogrammed as a second therm output. the limit registers are programmed and the device controlled and configured via the serial smbus. the contents of any register are also read back via the smbus. control and configuration functions consist of switching the device between normal operation and standby mode, selecting the temperature measurement range, masking or enabling the alert output, switching pin 6 between alert and therm2 , and selecting the conversion rate. beta variation cancellation the adt7421 includes a new temperature sensing method which cancels out the effect of varying beta factors being observed when different currents are applied to the embedded thermal transistor in small geometry processes. this method also ensure consistent and accurate temperature measurements between cpu?s. series resistance cancellation parasitic resistance to the d+ and d ? inputs to the adt7421, seen in series with the remote transistor, is caused by a variety of factors, including pcb track resistance and track length. this series resistance appears as a temperature offset in the remote sensor?s temperature measurement. this error typically causes a 0.5 c offset per ohm of parasitic resistance in series with the remote transistor. the adt7421 automatically cancels the effect of this series resistance on the temperature reading, giving a more accurate result, wit hout the need for user characterization of this resistance. the adt7421 is designed to automatically cancel typically up to 50 of resistance. by using an advanced temperature measurement method, this process is transparent to the user. temperature measurement method a simple method of measuring temperature is to exploit the negative temperature coefficient of a transistor, measuring the base emitter voltage (v be ) of a transistor operated at constant current. however, this technique requires calibration to null the effect of the absolute value of v be , which varies from device to device. the technique used in the adt7421 measures the change in v be when the device operates at three different currents. previous devices used only two operating currents, but it is the use of a third current that allows automatic cancellation of resistances in series with the external temperature sensor. figure 9 shows the input signal conditioning used to measure the output of an external temperature sensor. this figure shows the external sensor as a substrate transistor, but it can equally be a discrete transistor. if a discrete transistor is used, the collector is not grounded but is linked to the base. to prevent gr ound noise interfering with the measurement, the more negative terminal of the sensor is not referenced to ground, but is biased above ground by an internal transistor at the d ? input. c1 may be added as a noise filter (a recommended maximum value of 2200 pf). to measure v be , the operating current through the sensor is switched among three related currents. as shown in figure 9, n1 i and n2 i are different multiples of the current, i. the currents through the temperature transistor are switched between i and n1 i, giving v be1 ; and then between i and n2 i, giving v be2 . the temperature is then calculated using the two v be measurements. this method also cancels the effect of any series resistance on the temperature measurement. the resulting v be waveforms are passed through a 65 khz low ? pass filter to remove noise and then to a chopper ? stabilized amplifier. this amplifies and rectifies the waveform to produce a dc voltage proportional to v be . the adc digitizes this voltage producing a temperature measurement. to reduce the ef fects of noise, digital filtering is performed by averaging the results of 16 measurement cycles for low conversion rates. at rates of 10, 20, and 36 conversions per second, no digital averaging occurs. signal conditioning and measurement of the internal temperature sensor are performed in the same manner.
adt7421 http://onsemi.com 7 figure 9. input signal conditioning note: v dd i bias n2 i i bias diode d+ d? c1 remote sensing transistor f c = 65khz v out+ v out? to adc n1 i capacitor c1 is optional. it is only necessary in noisy environments. c1 = 1000pf max. temperature measurement results the results of the local and remote temperature measurements are stored in the local and remote temperature value registers and compared with limits programmed into the local and remote high and low limit registers. the local temperature value is in register 0x00 and has a resolution of 1 c. the external temperature value is stored in two registers, with the upper byte in register 0x01 and the lower byte in register 0x10. only the two msbs in the external temperature low byte are used giving the external temperature measurement a resolution of 0.25 c. the table lists the data format for the external temperature low byte. table 1. extended temperature resolution (remote temperature low byte) extended resolution remote temperature low byte 0.00 c 0 000 0000 0.25 c 0 100 0000 0.50 c 1 000 0000 0.75 c 1 100 0000 when reading the full external temperature value, read the lsb first. this causes the msb to be locked (that is, the adc does not write to it) until it is read. this feature ensures that the results read back from the two registers come from the same measurement. temperature measurement range the temperature measurement range for both internal and external measurements is, by default, 0 c to +125 c. however, the adt7421 can be operated using an extended temperature range. the extended measurement range is ? 40 c to +125 c. the extended temperature range is selected by setting bit 2 of the configuration register to 1. the temperature range is 0 c to 125 c when bit 2 equals 0. a valid result is available in the next measurement cycle after changing the temperature range. in extended temperature mode, the upper and lower temperature that can be measured by the adt7421 is limited by the remote transistor selection. the temperature registers can have values from ? 40 c to +125 c. most temperature sensing transistors have a maximum temperature range of ? 55 c to +150 c. above +150 c, they may lose their semiconductor characteristics and approximate conductors instead. it should be noted that although both local and remote temperature measurements can be made while the part is in extended temperature mode, the adt7421 itself should not be exposed to temperatures greater than those specified in the absolute maximum ratings table. further, the device is only guaranteed to operate as specified at ambient temperatures from ? 40 c to +125 c. temperature data format the adt7421 has two temperature data formats. when the temperature measurement range is from 0 c to 125 c (default), the temperature data format for both internal and external temperature results is binary. when the measurement range is in extended mode, an offset binary data format is used for both internal and external results. temperature values are offset by 64 c in the offset binary data format. examples of temperatures in both data formats are shown in the following table. table 2. temperature data format (temperature high byte) temperature binary offset binary ? 40 c 0 000 0000 0 001 1000 0 c 0 000 0000 0 100 0000 +1 c 0 000 0001 0 100 0001 +10 c 0 000 1010 0 100 1010 +25 c 0 001 1001 0 101 1001 +50 c 0 011 0010 0 111 0010 +75 c 0 100 1011 1 000 1011 +100 c 0 110 0100 1 010 0100 +125 c 0 111 1101 1 011 1101 1. offset binary scale temperature values are offset by 64 c . 2. binary scale temperature measurement returns 0 c for all temperatures < 0 c . 3. binary scale temperature measurement returns 125c for all temperatures > 125c.
adt7421 http://onsemi.com 8 the user can switch between measurement ranges at any time. switching the range likewise switches the data format. the next temperature result following the switching is reported back to the register in the new format. however, the contents of the limit registers do not change. it is up to the user to ensure that when the data format changes, the limit registers a re reprogrammed as necessary. more information on this is found in the limit registers section. adt7421 registers the adt7421 contains 22, 8 ? bit registers in total. these registers store the results of remote and local temperature measurements, high and low temperature limits, and configure and control the device. see the section through the consecutive alert register section of this data sheet for more information on the adt7421 registers. additional details are shown in table 3 through table 7. the entire register map is available in table 8. address pointer register the address pointer register itself does not have, nor does it require, an address because the first byte of every write operation is automatically written to this register. the data in this first byte always contains the address of another register on the adt7421 that is stored in the address pointer register. it is to this register address that the second byte of a write operation is written, or to which a subsequent read operation is performed. the power ? on default value of the address pointer register is 0x00. therefore, if a read operation is performed immediately after power ? on, without first writing to the address pointer, the value of the local temperature is returned because its register address is 0x00. temperature value registers the adt7421 has three registers to store the results of local and remote temperature measurements. these registers can only be written to by the adc and can be read by the user over the smbus. the local temperature value register is at address 0x00. the external temperature value high byte register is at address 0x01, with the low byte register at address 0x10. the power ? on default for all three registers is 0x00. configuration register the configuration register is address 0x03 at read and address 0x09 at write. its power ? on default is 0x08. only five bits of the configuration register are used. bit 0, bit 1, and bit 3 are reserved; the user does not write to them. bit 7 of the configuration register masks the alert output. if bit 7 is 0, the alert output is enabled. this is the power ? on default. if bit 7 is set to 1, the alert output is disabled. this applies only if pin 6 is configured as alert . if pin 6 is configured as therm2 , then the value of bit 7 has no effect. if bit 6 is set to 0, which is power ? on default, the device is in operating mode with adc converting. if bit 6 is set to 1, the device is in standby mode and the adc does not convert. the smbus does, however, remain active in sta ndby mode; therefore, values can be read from or written to the adt7421 via the smbus. the alert and therm outputs are also active in standby mode. changes made to the registers in standby mode that affect the therm or alert outputs cause these signals to be updated. bit 4 switches beta cancellation on and off. with bit 4 set to zero beta cancellation is set on. if using a discrete transistor as the sensing element, beta cancellation should be switched off by setting bit 4 to 1. bit 5 determines the configuration of pin 6 on the adt7421. if bit 5 is 0 (default), then pin 6 is configured as an alert output. if bit 5 is 1, then pin 6 is configured as a therm2 output. bit 7, the alert mask bit, is only active when pin 6 is configured as an alert output. if pin 6 is set up as a therm2 output, then bit 7 has no effect. bit 2 sets the temperature measurement range. if bit 2 is 0 (default value), the temperature measurement range is set between 0 c to +125 c. setting bit 2 to 1 sets the measurement range to the extended temperature range ( ? 40 c to +125 c). table 3. configuration register bit assignments bit name function power ? on default 7 mask1 0 = alert enabled 1 = alert masked 0 6 run/stop 0 = run 1 = standby 0 5 alert / therm2 0 = alert 1 = therm2 0 4 beta enable 0 = beta compensation on 1 = beta compensation off 0 3 reserved reserved 1 2 temperature range select 0 = 0 c to 125 c 1 = extended range 0 1 reserved reserved 0 0 reserved reserved 0 conversion rate register the conversion rate register is address 0x04 at read and address 0x0a at write. the lowest four bits of this register are used to program the conversion rate. for example, a conversion rate of five conversions per second means that beginning at 200 ms intervals, the device performs a conversion on the internal and the external temperature channels. the conversion rate register can be written to and read back o ver the smbus. the higher four bits of this register are unused and must be set to 0. the default value of this register is 0x06, giving a rate of 4 conversions per second. use of slower conversion times greatly reduces the device power consumption.
adt7421 http://onsemi.com 9 table 4. conversion rate register codes code conversion/second time (secs) 0x00 0.0625 16 0x01 0.125 8 0x02 0.25 4 0x03 0.5 2 0x04 1 1 0x05 2 500 m 0x06 4 (default) 250 m 0x07 5 200 m 0x08 10 100 m 0x09 20 50 m 0x0a 36 27 m 0x0b to 0xff reserved limit registers the adt7421 has eight limit registers: high, low, and therm temperature limits for both local and remote temperature measurements. the remote temperature high and low limits span two registers each, to contain an upper and lower byte for each limit. there is also a therm hysteresis register. all limit registers can be written to, and read back over, the smbus. see table 8 for details of the limit register addresses and their power ? on default values. when pin 6 is configured as an alert output, the high limit registers perform a > comparison, while the low limit registers perform a comparison. for example, if the high limit register is programmed with 80 c, then measuring 81 c results in an out ? of ? limit condition, setting a flag in the status register. if the low limit register is programmed with 0 c, measuring 0 c or lower results in an out ? of ? limit condition. exceeding either the local or remote therm limit asserts therm low. when pin 6 is configured as therm2 , exceeding either the local or remote high limit asserts therm2 low. a default hysteresis value of 10 c is provided that applies to both therm channels. this hysteresis value can be reprogrammed to any value after powerup (register address 0x21). it is important to remember that the temperature limits data format is the same as the temperature measurement data format. therefore, if the temperature measurement uses default binary, then the temperature limits also use the binary scale. if the temperature measurement scale is switched, however, the temperature limits do not automatically switch. the user must reprogram the limit registers to the desired value in the correct data format. for example, if the remote low limit is set at 10 c with the default binary scale, the limit register value is 0000 1010b. if the scale is switched to offset binary, the value in the low temperature limit register needs to be reprogrammed to 0100 1010b. status register the status register is a read ? only register at address 0x02. it contains status information for the adt7421. when bit 7 of the status register is high, it indicates that the adc is busy converting. the other bits in this register flag the out ? of ? limit temperature measurements (bit 6 to bit 3, and bit 1 to bit 0) and the remote sensor open circuit (bit 2). if pin 6 is configured as an alert output, the following applies: if the local temperature measurement exceeds its limits, bit 6 (high limit) or bit 5 (low limit) of the status register asserts to flag this condition. if the remote temperature measurement exceeds its limits, then bit 4 (high limit) or bit 3 (low limit) asserts. bit 2 asserts to flag an open circuit condition on the remote sensor. these five flags are nor?ed together, so if any of them is high, the alert interrupt latch is set and the alert output goes low. reading the status register clears the five flags, bit 6 to bit 2, provided the error conditions causing the flags to be set have gone away. a flag bit can be reset only if the corresponding value register contains an in ? limit measurement or if the sensor is good. the alert interrupt latch is not reset by reading the status register. it resets when the alert output has been serviced by the master reading the device address, provided the error condition has gone away and the status register flag bits are reset. when flag 1 and/or flag 0 are set, the therm output goes low to indicate that the temperature measurements are outside the programmed limits. the therm output does not need to be reset, unlike the alert output. once the measurements are within the limits, the corresponding status register bits are automatically reset and the therm output goes high. the user may add hysteresis by programming register 0x21. the therm output is reset only when the temperature falls to limit value minus the hysteresis value. when pin 6 is configured as therm2 , only the high temperature limits are relevant. if flag 6 and/or flag 4 are set, the therm2 output goes low to indicate that the temperature measurements are outside the programmed limits. flag 5 and flag 3 have no effect on therm2 . the behavior of therm2 is otherwise the same as therm . table 5. status register bit assignments bit name function 7 busy 1 when adc converting 6 lhigh* 1 when local high temperature limit tripped 5 llow* 1 when local low temperature limit tripped 4 rhigh* 1 when remote high temperature limit tripped 3 rlow* 1 when remote low temperature limit tripped 2 open* 1 when remote sensor open circuit 1 rthrm 1 when remote therm limit tripped 0 lthrm 1 when local therm limit tripped *these flags stay high until the status register is read or they are reset by por unless pin 6 is configured as therm2 . then, only bit 2 remains high until the status register is read or is reset by por.
adt7421 http://onsemi.com 10 offset register offset errors can be introduced into the remote temperature measurement by clock noise or when the thermal transistor is located away from the hot spot. to achieve the specified accuracy on this channel, these offsets must be removed. the offset value is stored as a 10 ? bit, twos complement value in register 0x11 (high byte) and register 0x12 (low byte, left j ustified). only the upper two bits of register 0x12 are used. the msb of register 0x11 is the sign bit. the minimum, programmable offset is ? 128 c, and the maximum is +127.75 c. the value in the offset register is added to, or subtracted from, the measured value of the remote temperature. the offset register powers up with a default value of 0 c and has no effect unless the user writes a different value to it. table 6. sample offset register codes offset value 0x11 0x12 ? 128 c 1000 0000 00 00 0000 ? 4 c 1111 1100 00 00 0000 ? 1 c 1111 1111 00 00 0000 ? 0.25 c 1111 1111 11 00 0000 0 c 0000 0000 00 00 0000 +0.25 c 0000 0000 01 00 0000 +1 c 0000 0001 00 00 0000 +4 c 0000 0100 00 00 0000 +127.75 c 0111 1111 11 00 0000 one ? shot register the one ? shot register is used to initiate a conversion and comparison cycle when the adt7421 is in standby mode, after which the device returns to standby. writing to the one ? shot register address (0x0f) causes the adt7421 to perform a conversion and comparison on both the internal and the external temperature channels. this is not a data register as such, and it is the write operation to address 0x0f that causes the one ? shot conversion. the data written to this address is irrelevant and is not stored. consecutive alert register the value written to this register determines how many out ? of ? limit measurements must occur before an alert is generated. the default value is that one out ? of ? limit measurement generates an alert . the maximum value that can be chosen is 4. the purpose of this register is to allow the user to perform some filtering of the output. this is particularly useful at the fastest three conversion rates, where no averaging takes place. this register is at address 0x22. table 7. consecutive alert register 0x22 bits value ? number of out ? of ? limit measurements required <3 ? 0> 000x 1 001x 2 011x 3 111x 4 ?x = don?t care bit.
adt7421 http://onsemi.com 11 table 8. list of registers read address (hex) write address (hex) name power ? on default binary hex decimal not applicable not applicable address pointer undefined 00 not applicable local temperature value 0000 0000 0x00 01 not applicable external temperature value high byte 0000 0000 0x00 02 not applicable status undefined 03 09 configuration 0000 1000 0x08 04 0a conversion rate 0000 1000 0x06 05 0b local temperature high limit 0101 0101 0x55 85 c 06 0c local temperature low limit 0000 0000 0x00 0 c 07 0d external temperature high limit high byte 0101 0101 0x55 85 c 08 0e external temperature low limit high byte 0000 0000 0x00 0 c not applicable 0f one ? shot 10 not applicable external temperature value low byte 0000 0000 0x00 11 11 external temperature offset high byte 0000 0000 0x00 12 12 external temperature offset low byte 0000 0000 0x00 13 13 external temperature high limit low byte 0000 0000 0x00 14 14 external temperature low limit low byte 0000 0000 0x00 19 19 external therm limit 0101 0101 0x55 85 c 20 20 local therm limit 0101 0101 0x55 85 c 21 21 therm hysteresis 0000 1010 0x0a 10 c 22 22 consecutive alert 0000 0001 0x01 3d not applicable device id 0010 0001 0x21 fe not applicable manufacturer id 0100 0001 0x41 ff not applicable die revision code serial bus interface control of the adt7421 is carried out via the serial bus. the adt7421 is connected to this bus as a slave device, under the control of a master device. the adt7421 has an smbus timeout feature. when this is enabled, the smbus times out after typically 25 ms of no activity. however, this feature is not enabled by default. bits 6 and 7 of the consecutive alert register (address = 0x22) should be set to enable it. addressing the device in general, every smbus device has a 7 ? bit device address, except for some devices that have extended 10 ? bit addresses. when the master device sends a device address over the bus, the slave device with that address responds. the adt7421is available with one device address, 0x4c (1001 100b). the adt7421 ? 2 is also available. the adt7421 ? 2 has an smbus address of 0x4d (1001 101b). this is to allow two adt7421 devices on the same bus, or if the default address conflicts with an existing device on the smbus. the serial bus protocol operates as follows: the master initiates a data transfer by establishing a start condition, defined as a high ? to ? low transition on sdata, the serial data line, while sclk, the serial clock line, remains high. this indicates that an address/data stream follows. all slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7 ? bit address (msb first) plus an r/w bit, which determines the direction of the data transfer, that is, whether data is written to, or read from, the slave device. the peripheral whose address corresponds to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. all other devices on the bus remain idle while the selected device waits for data to be read from or written to it. if the r/w bit is a 0, the master writes to the slave device. if the r/w bit is a 1, the master reads from the slave device. 1. data is sent over the serial bus in a sequence of nine clock pulses, eight bits of data followed by an acknowledge bit from the slave device. transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, since a low ? to ? high transition when the clock is high can be interpreted as a stop signal. the number of data bytes that can be transmitted over the serial bus in a single read or
adt7421 http://onsemi.com 12 write operation is limited only by what the master and slave devices can handle. 2. when all data bytes have been read or written, stop conditions are established. in write mode, the master pulls the data line high during the tenth clock pulse to assert a stop condition. in read mode, the master device overrides the acknowledge bit by pulling the data line high during the low period before the ninth clock pulse. this is known as no acknowledge. the master takes the data line low during the low period before the tenth clock pulse, then high during the tenth clock pulse to assert a stop condition. any number of bytes of data are transferable over the serial bus in one operation, but it is not possible to mix read and write in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. for the adt7421, w rite operations contain either one or two bytes, while read operations contain one byte. to write data to one of the device data registers, or to read data from it, the address pointer register must be set so that the correct data register is addressed. the first byte of a write operation always contains a valid address that is stored in the address pointer register. if data is to be written to the device, the write operation contains a second data byte that is written to the register selected by the address pointer register. this procedure is illustrated in figure 10. the device address is sent over the bus followed by r/w set to 0. this is followed by two data bytes. the first data byte is the address of the internal data register to be written to, which is stored in the address pointer register. the second data byte is the data to be written to the internal data register. figure 10. writing a register address to the address pointer register, then writing data to the selected register figure 11. writing to the address pointer register only figure 12. reading from a previously selected register d7 d6 d5 d4 d3 d2 d1 d0 frame 3 data byte ack. by adt7421 stop by master sdata (continued) sclk (continued) frame 1 serial bus address byte ack. by adt7421 sdata sclk start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 r/w ack. by adt7421 1 1 9 9 1 9 frame 1 serial bus address byte ack. by adt7421 sdata sclk start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 r/w ack. by adt7421 1 1 9 9 stop by master frame 1 serial bus address byte ack. by adt7421 sdata sclk start by master frame 2 address pointer register byte d7 d6 d5 d4 d3 d2 d1 d0 a6 a5 a4 a3 a2 a1 a0 r/w ack. by adt7421 1 1 9 9 stop by master
adt7421 http://onsemi.com 13 when reading data from a register there are two possibilities. ? if the address pointer register value of the adt7421 is unknown or not the desired value, it is first necessary to set it to the correct value before data can be read from the desired data register. this is done by writing to the adt7421 as before, but only the data byte containing the register read address is sent, because data is not to be written to the register (see figure 11). a read operation is then performed consisting of the serial bus address, r/w bit set to 1, followed by the data byte read from the data register (see figure 12). ? if the address pointer register is known to be at the desired address, data can be read from the corresponding data register without first writing to the address pointer register and the bus transaction shown in figure 11 can be omitted. notes ? it is possible to read a data byte from a data register without first writing to the address pointer register. however, if the address pointer register is already at the correct value, it is not possible to write data to a register without writing to the address pointer register because the first data byte of a write is always written to the address pointer register. ? some of the registers have different addresses for read and write operations. the write address of a register must be written to the address pointer if data is to be written to that register, but it may not be possible to read data from that address. the read address of a register must be written to the address pointer before data can be read from that register. alert output this is applicable when pin 6 is configured as an alert output. the alert output goes low whenever an out ? of ? limit measurement is detected, or if the remote temperature sensor is open circuit. it is an open ? drain output and requires a pullup resistor. several alert outputs can be wire ? or?ed together, so that the common line goes low if one or more of the alert outputs goes low. the alert output can be used as an interrupt signal to a processor, or as an smbalert . slave devices on the smbus cannot normally signal to the bus master that they want to talk, but the smbalert function allows them to do so. one or more alert outputs can be connected to a common smbalert line that is connected to the master. when the smbalert line is pulled low by one of the devices, the following procedure occurs (see figure 13): figure 13. use of smbalert alert response address master sends ara and read command device sends its address rd start ack device address no ack stop master receives smbalert 1. smbalert is pulled low. 2. master initiates a read operation and sends the alert response address (ara = 0001 100). this is a general call address that must not be used as a specific device address. 3. the device whose alert output is low responds to the alert response address and the master reads its device address. as the device address is seven bits, an lsb of 1 is added. the address of the device is now known and it can be interrogated in the usual way. 4. if more than one device?s alert output is low, the one with the lowest device address takes priority, in accordance with normal smbus arbitration. once the adt7421 has responded to the alert response address, it resets its alert output, provided that the error condition that caused the alert no longer exists. if the smbalert line remains low, the master sends the ara again, and so on until all devices whose alert outputs were low have responded. low power standby mode the adt7421 can be put into low power standby mode by setting bit 6 of the configuration register. when bit 6 is low, the adt7421 operates normally. when bit 6 is high, the adc is inhibited, and any conversion in progress is terminated without writing the result to the corresponding value register. however, the smbus is still enabled. power consumption in the standby mode is reduced to 10 a. when the device is in standby mode, it is possible to initiate a one ? shot conversion of both channels by writing to the one ? shot register (address 0x0f), after which the device returns to standby. it does not matter what is written to the one ? shot register, all data written to it is ignored. it is also possible to write new values to the limit register while in standby mode. if the values stored in the temperature value registers are outside the new limits, an alert is generated, even though the adt7421 is still in standby. sensor fault detection at its d+ input, the adt7421 contains internal sensor fault detection circuitry. this circuit can detect situations where an external remote transistor is either not connected or incorrectly connected to the adt7421. a simple voltage comparator trips if the voltage at d+ exceeds v dd ? 1.0 v (typical), signifying an open circuit between d+ and d ? . the output of this comparator is checked when a conversion is initiated. bit 2 of the status register (open flag) is set if a fault is detected. if the alert pin is enabled, setting this flag causes alert to assert low. if the user does not wish to use an external sensor with the adt7421, tie the d+ and d ? inputs together to prevent continuous setting of the open flag.
adt7421 http://onsemi.com 14 the adt7421 interrupt system the adt7421 has two interrupt outputs, alert and therm . both have different functions and behavior. alert is maskable and responds to violations of software programmed temperature limits or an open ? circuit fault on the external transistor. therm is intended as a fail ? safe interrupt output that cannot be masked. if the external or local temperature exceeds the programmed high temperature limits, or equals or exceeds the low temperature limits, the alert output is asserted low. an open ? circuit fault on the external transistor also causes alert to assert. alert is reset when serviced by a master reading its device address, provided the error condition has gone away and the status register has been reset. the therm output asserts low if the external or local temperature exceeds the programmed therm limits. therm temperature limits should normally be equal to or greater than the high temperature limits. therm is reset automatically when the temperature falls back within the therm limit. the external and local limits are set by default to 85 c. a hysteresis value can be programmed; in which case, therm resets when the temperature falls to the limit value minus the hysteresis value. this applies to both local and remote measurement channels. the power ? on hysteresis default value is 10 c, but this can be reprogrammed to any value between 0 c and 31 c after powerup. the hysteresis loop on the therm outputs is useful when therm is used, for example, as an on/off controller for a fan. the user?s system can be set up so that when therm asserts, a fan is switched on to cool the system. when therm goes high again, the fan can be switched off. programming a hysteresis value protects from fan jitter, where the temperature hovers around the therm limit, and the fan is constantly switched. table 9. therm hysteresis therm hysteresis binary representation 0 c 0 000 0000 1 c 0 000 0001 10 c 0 000 1010 figure 14 shows how the therm and alert outputs operate. the alert output can be used as a smbalert to signal to the host via the smbus that the temperature has risen. the user can use the therm output to turn on a fan to cool the system, if the temperature continues to increase. this method ensures that there is a fail ? safe mechanism to cool the system, without the need for host intervention. figure 14. operation of the alert and therm interrupts 1 3 2 4 therm limit high temp limit therm limit ? reset by master alert therm 100 c temperature 90 c 80 c 70 c 60 c 50 c 40 c hysteresis ? if the measured temperature exceeds the high temperature limit, the alert output asserts low. ? if the temperature continues to increase and exceeds the therm limit, the therm output asserts low. this can be used to throttle the cpu clock or switch on a fan. ? the therm output de ? asserts (goes high) when the temperature falls to therm limit minus hysteresis. in figure 14, the default hysteresis value of 10 c is shown. ? the alert output de ? asserts only when the temperature has fallen below the high temperature limit, and the master has read the device address and cleared the status register. ? pin 6 on the adt7421 can be configured as either an alert output or as an additional therm output. ? therm2 asserts low when the temperature exceeds the programmed local and/or remote high temperature limits. it is reset in the same manner as therm and is not maskable. ? the programmed hysteresis value also applies to therm2 . figure 15 shows how therm and therm2 operate together to implement two met hods of cooling the system. in this example, the therm2 limits are set lower than the therm limits. the therm2 output is used to turn on a fan. if the temperature continues to rise and exceeds the therm limits, the therm output provides additional cooling by throttling the cpu. figure 15. operation of the therm and therm2 interrupts therm2 limit therm limit therm2 1 3 2 4 temperature therm 90 c 80 c 70 c 60 c 50 c 40 c 30 c
adt7421 http://onsemi.com 15 ? when the therm2 limit is exceeded, the therm2 signal asserts low. ? if the temperature continues to increase and exceeds the therm limit, the therm output asserts low. ? the therm output de ? asserts (goes high) when the temperature falls to therm limit minus hysteresis. in figure 15, there is no hysteresis value shown. ? as the system cools further, and the temperature falls below the therm2 limit, the therm2 signal resets. again, no hysteresis value is shown for therm2 . both the external and internal temperature measurements cause therm and therm2 to operate as described. application information remote sensing transistor the adt7421 is designed to work with substrate transistors built into processors or with discrete transistors. substrate transistors are generally pnp types with the collector connected to the substrate. discrete types are either pnp or npn transistors c onnected as transistors (base ? shorted to collector). if an npn transistor is used, the collector and base are connected to d+ and the emitter to d ? . if a pnp transistor is used, the collector and base are connected to d ? and the emitter to d+. note that beta cancellation should be turned off when using a discrete transistor. this is done by setting bit 4 of the configuration register to 1. to reduce the error due to variations in both substrate and discrete transistors, consider several factors: ? the ideally factor, n f , of the transistor is a measure of the deviation of the thermal transistor from ideal behavior. the adt7421 is trimmed for an n f value of 1.008. the following equation may be used to calculate the error introduced at a temperature, t ( c), when using a transistor whose n f does not equal 1.008. consult the processor data sheet for the n f values. t (n r 1.008) 1.008 (273.15 kelvin t) to factor this in, the user writes the t value to the offset register. it is then automatically added to, or subtracted from, the temperature measurement. ? some cpu manufacturers specify the high and low current levels of the substrate transistors. the high current level of the adt7421, i high , is 220 a and the low level current, i low , is 13.5 a. if the adt7421 current levels do not match the current levels specified by the cpu manufacturer, it may become necessary to remove an offset. the cpu data sheet should advise whether this offset needs to be removed and how to calculate it. this offset is programmed to the offset register. it is important to note that if more than one offset must be, considered, the algebraic sum of these offsets must be programmed to the offset register. if a discrete transistor is used with the adt7421, the best accuracy is obtained by choosing devices according to the following criteria: ? base ? emitter voltage greater than 0.25 v at 6 a, at the highest operating temperature ? base ? emitter voltage less than 0.95 v at 100 a, at the lowest operating temperature ? base resistance less than 100 ? small variation in h fe (50 to 150) that indicates tight control of v be characteristics transistors, such as the 2n3904, 2n3906, or equivalents in sot ? 23 packages are suitable devices to use. thermal inertia and self ? heating accuracy depends on the temperature of the remote sensing transistor and/or the internal temperature sensor being at the same temperature as that being measured. many factors can affect this. ideally, place the sensor in good thermal contact with the part of the system being measured. if it is not, the thermal inertia caused by the sensor?s mass causes a lag in the response of the sensor to a temperature change. in the case of the remote sensor, this should not be a problem since it is either a substrate transistor in the processor or a small package device, such as the sot ? 23, placed in close proximity to it. the on ? chip sensor, however, is often remote from the processor and only monitors the general ambient temperature around the package. how accurately the temperature of the board and/or the forced airflow reflects the temperature to be measured dictates the accuracy of the measurement. self ? heating due to the power dissipated in the adt7421 or the remote sensor causes the chip temperature of the device or remote sensor to rise above ambient. however, the current forced through the remote sensor is so small that self ? heating is negligible. in the case of the adt7421, the worst ? case condition occurs when the device is converting at 36 conversions per second while sinking the maximum current of 1 ma at the alert and therm output. in this case, the total power dissipation in the device is about 4.5 mw. the thermal resistance, ja , of the 8 ? lead msop is approximately 142 c/w. layout considerations digital boards can be electrically noisy environments, and the adt7421 is measuring very small voltages from the remote sensor, so care must be taken to minimize noise induced at the sensor inputs. t ake the following precautions: ? place the adt7421 as close as possible to the remote sensing transistor. provided that, the worst noise sources, that is, clock generators, data/address buses, and crt?s are avoided, this distance can be 4 to 8 inches. ? route the d+ and d ? tracks close together, in parallel, with grounded guard tracks on each side. to minimize
adt7421 http://onsemi.com 16 inductance and reduce noise pickup, a 5 ? mil track width and spacing is recommended. provide a ground plane under the tracks, if possible. figure 16. typical arrangement of signal tracks gnd d+ d? gnd 5mil 5mil 5mil 5mil 5mil 5mil 5mil ? try to minimize the number of copper/solder joints that can cause thermocouple effects. where copper/solder joints are used, make sure that they are in both the d+ and d ? path and at the same temperature. ? thermocouple effects should not be a major problem as 1 c corresponds to about 200 mv, and thermocouple voltages are about 3 mv/ c of temperature difference. unless there are two thermocouples with a big temperature differential between them, thermocouple voltages should be much less than 200 mv. ? place a 0.1 f bypass capacitor close to the v dd pin. in extremely noisy environments, place an input filter capacitor across d+ and d ? close to the adt7421. this capacitance can effect the temperature measurement, so ensure that any capacitance seen at d+ and d ? is, at maximum, 2200 pf. this maximum value includes the filter capacitance, plus any cable or stray capacitance between the pins and the sensor transistor. ? if the distance to the remote sensor is more than 8 inches, the use of twisted pair cable is recommended. a total of 6 feet to 12 feet is needed. for really long distances (up to 100 feet), use a shielded twisted pair, such as the belden no. 8451 microphone cable. connect the twisted pair to d+ and d ? and the shield to gnd close to the adt7421. leave the remote end of the shield unconnected to avoid ground loops. because the measurement technique uses switched current sources, excessive cable or filter capacitance can affect the measurement. when using long cables, the filter capacitance can be reduced or removed. application circuit figure 17 shows a typical application circuit for the adt7421, using a discrete sensor transistor connected via a shielded, twisted pair cable. the pull ? ups on sclk, sdata, and alert are required only if they are not provided elsewhere in the system. figure 17. typical application circuit 5v or 12v smbus controller fan control circuit cpu thermal diode or 2n3906 d+ d? v dd sclk sdata alert/ therm2 therm gnd adt7421 0.1 f v dd typ 10k fan enable 3v to 3.6v typ 10k shield cpu adt7421 register details table 10. status/configuration registers read address (hex) write address (hex) name power ? on default binary hex decimal not applicable not applicable address pointer undefined 02 not applicable status undefined 03 09 configuration 0000 1000 0x08 04 0a conversion rate 0000 0110 0x06 not applicable 0f one ? shot 22 22 consecutive alert 0000 0001 0x01 3d not applicable device id 0010 0001 0x21 fe not applicable manufacturer id 0100 0001 0x41 ff not applicable die revision code
adt7421 http://onsemi.com 17 table 11. configuration register; read address 0x03, write address 0x09 bit mnemonic read/write description 7 mask r/w setting this bit to 1 masks all alert s on the alert pin. default = 0 = alert enabled. this applies only if pin 8 is configured as alert , otherwise it has no effect. 6 run/stop r/w setting this bit to 1 places the adt7421 in standby mode (that is, it suspends all temperature measurements (adc). the smbus remains active and values can be written to and read from the registers. therm and alert are also active in standby mode. changes made to the limit registers in standby mode that effect the therm or alert outputs cause these signals to be updated. default = 0 = temperature monitoring enabled. 5 alert /therm2 r/w this bit selects the function of pin 8. default = 0 = alert . setting this bit to 1 configures pin 8 as therm2 pin. 4 beta enable r/w setting this bit to 0 enables beta cancellation. setting it to 1 disables beta cancellation. 3 reserved read only reserved 2 temperature range select r/w setting this bit to 1 enables the extended temperature measurement range ( ? 50 c to +150 c). default = 0 = (0 c to +127 c). 1 reserved read only reserved 0 reserved read only reserved table 12. conversion rate register (read address = 0x04, write address = 0x0a) bit code mnemonic function 7 reserved reserved 6 reserved reserved 5 reserved reserved 4 reserved reserved <3:0> conversion rates these bits set how often the adt7421 measures each temperature channel. 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a conversions/sec 0000 = 0.0625 0001 = 0.125 0010 = 0.25 0011 = 0.5 0100 = 1 0101 = 2 0110 = 4 = default 0111 = 5 1000 = 10 1001 = 20 1010 = 36 time (seconds) 16 8 4 2 1 500 m 250 m 200 m 100 m 50 m 27 m table 13. status register; (read address = 0x02) bit name function alert 7 busy 1 when adc converting no 6 lhigh (note 1) 1 when local high temperature limit tripped yes 5 llow (note 1) 1 when local low temperature limit tripped yes 4 rhigh (note 1) 1 when remote 1 high temperature limit tripped yes 3 rlow (note 1) 1 when remote 1 low temperature limit tripped yes 2 d open (note 1) 1 when remote 1 sensor open circuit yes 1 rthrm 1 when remote 1 therm limit is tripped no 0 lthrm 1 when local therm limit is tripped no 1. these flags stay high until the status register is read, or they are reset by por
adt7421 http://onsemi.com 18 table 14. consecutive alert register (read address = 0x22, write address = 0x22) bit name function 7 scl timeout 1 = scl timeout enabled. 0 = scl timeout disabled = default 6 sda timeout 1 = sda timeout enabled. 0 = sda timeout disabled = default 5 reserved reserved 4 reserved reserved <3:0> fault queue amount of out ? of ? limit measurements required for alert 111x = 4 011x = 3 001x = 2 000x = 1 table 15. value registers read address (hex) write address (hex) name power ? on default binary hex decimal 00 not applicable local temperature value 0000 0000 0x00 01 not applicable external temperature value high byte 0000 0000 0x00 10 not applicable external temperature value low byte 0000 0000 0x00 table 16. limit registers read address (hex) write address (hex) name power ? on default binary hex decimal 05 0b local temperature high limit 0101 0101 0x55 85 c 06 0c local temperature low limit 0000 0000 0x00 0 c 07 0d external temperature high limit high byte 0101 0101 0x55 85 c 08 0e external temperature low limit high byte 0000 0000 0x00 0 c 11 11 external temperature offset high byte 0000 0000 0x00 12 12 external temperature offset low byte 0000 0000 0x00 13 13 external temperature high limit low byte 0000 0000 0x00 14 14 external temperature low limit low byte 0000 0000 0x00 19 19 external therm limit 0101 0101 0x55 85 c 20 20 local therm limit 0101 0101 0x55 85 c 21 21 therm hysteresis 0000 1010 0x0a 10 c ordering information device order number* package type part marking smbus address shipping ? adt7421arz-reel 8-lead soic_n t7421 4c 2500 tape & reel adt7421arz-reel7 8-lead soic_n t7421 4c 1000 tape & reel adt7421armz-reel 8-lead msop l75 4c 3000 tape & reel adt7421armz-rl7 8-lead msop l75 4c 1000 tape & reel ADT7421ARMZ-2RL 8-lead msop l76 4d 3000 tape & reel ADT7421ARMZ-2RL7 8-lead msop l76 4d 1000 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *the ?z?? suffix indicates pb ? free package.
adt7421 http://onsemi.com 19 package dimensions seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* soic ? 8 nb case 751 ? 07 issue aj
adt7421 http://onsemi.com 20 package dimensions s b m 0.08 (0.003) a s t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. 846a-01 obsolete, new standard 846a-02. b e pin 1 id 8 pl 0.038 (0.0015) ? t ? seating plane a a1 c l dim a min nom max min millimeters ?? ?? 1.10 ?? inches a1 0.05 0.08 0.15 0.002 b 0.25 0.33 0.40 0.010 c 0.13 0.18 0.23 0.005 d 2.90 3.00 3.10 0.114 e 2.90 3.00 3.10 0.114 e 0.65 bsc l 0.40 0.55 0.70 0.016 ?? 0.043 0.003 0.006 0.013 0.016 0.007 0.009 0.118 0.122 0.118 0.122 0.026 bsc 0.021 0.028 nom max 4.75 4.90 5.05 0.187 0.193 0.199 h e h e d d e msop8 case 846ab ? 01 issue o *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8x 8x 6x mm inches scale 8:1 1.04 0.041 0.38 0.015 5.28 0.208 4.24 0.167 3.20 0.126 0.65 0.0256 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 adt7421/d protected by us patents 5,195,827; 5,867,012; 5,982,221; 6,097,239; 6,133,753; 6,169,442; 7,010,440; other patents pending. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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